The present invention pertains to analogue-to-digital converters in general and in particular to the high speed high resolution converter types.
There are many AD converters, however the two most popular at the present time are: the successive approximation type, and variations thereof; and the parallel or flash converter type, and a variation thereof, the half-flash converter, which combines both successive approximation and flash methods.
In a successive approximation converter a voltage is generated from zero to maximum, by an internal digital-to-analogue converter and each successive increment compared with the converter input voltage until a match is reached, the setting of the DA converter then represents the value of the input voltage.
A flash converter consists essentially of a voltage divider resistor ladder with fixed tap positions defining resistor segments corresponding to the desired resolution of the converter. Accordingly a converter of "n" bit resolution would require 2.sup.n+1 resistor segments. Each tap is connected to a comparator of its own, and accordingly 2.sup.n-1 comparators are needed. Each comparator compares its voltage divider voltage with the converter's input voltage. The line of comparators respond according to a "thermometer code", those comparators with thresholds below the converter input voltage, turn on, while those with thresholds above the input voltage remain off. The output of all the comparators is then translated by an encoder into a binary or decimal number.
In a half-flash converter, the output of a first flash-converter of low resolution is used to generate a voltage by means of an internal digital-to-analogue converter, this voltage is then subtracted from the input voltage to provide a new voltage representing the lower resolution portion of the input voltage, which is then fed into a second flash-converter unit and both results combined by appropriate encoder units. Here speed is sacrificed for reduction in total number of comparators, however the total circuit is no longer monotonic.
It can be seen that typically a successive approximation method is very slow as it does require 2.sup.n-1 successive operations, and a flash-converter is complex as it requires 2.sup.n-1 comparators. In way of example, an 8 bit converter would require 255 comparators, while a 9 bit converter requires 511 comparators, since it increases geometrically.